Genel Nitelikler
• Üniversitelerin Bilgisayar, Elektrik-Elektronik, Elektronik ve Haberleşme, Bilgisayar Mühendisliği bölümlerinden mezun
• FPGA seviyesinde sayısal tasarım ve doğrulama konusunda deneyime sahip
• VHDL/Verilog/System Verilog ve C/C++ dillerine hâkim
• RTL simülasyon, lojik sentez, Timing Contraints, Timing Closure, STA (Static Timing Analysis) gibi sayısal tasarım konularına hakim
• SoC tasarım metotları ve araçlarına hâkim
• PCIe, Uart, I2C,SPI,RS422,RS485,ARINC429,MIL – STD1553B gibi haberleşme protokollerine hâkim
• Osiloskop, lojik analizör, ILA (Integrated Logic Analyzer) gibi laboratuvar araç gereçlerini kullanabilen
Tercih Sebepleri
• Analog ve dijital haberleşme alanında tecrübeli
• Sayısal Sinyal İşleme (DSP) ve RF uygulamalarında tecrübeli
• UVM (Universal Verification Methodology) ile doğrulama (Verification) hakkında bilgi sahibi
• Perl, TCL gibi script dillerine hakim takım arkadaşları aranmaktadır.
Key Qualifications
• B.Sc. and/or M.Sc. in Electrical/Electronics Engineering, Electronics and Communication Engineering or Computer Engineering departments
• Experience in FPGA (Preferred on Xilinx) design and verification
• Good knowledge of VHDL/Verilog/System Verilog and C/C++
• Understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA (Static Timing Analysis)
• Experienced in SoC (Preferred Xilinx ZYNQ) design methodologies and tools
• Experienced with serial communication protocols such as Ethernet, PCIe, UART, I2C, SPI, RS422, RS485, ARINC429, MIL – STD 1553B
• Strong troubleshooting and analytical skills using laboratory equipment including oscilloscopes, logic analyzers, and ILA/signal tap, protocol analyzers are strongly preferred
Preferred Qualifications
• Experience in Analog and Digital Communication
• Experience in Digital Signal Processing and RF Applications
• Knowledge of UVM (Universal Verification Methodology) and experience with formal verification is an asset
• Experience in scripting languages (Perl, TCL)