Digital Design Engineer

Digital Design Engineer

General Qualifications
•    Graduated from Computer, Electrical-Electronics, Electronics and Communication, Computer Engineering departments of universities
•    Experienced in digital design and verification at FPGA level
•    VHDL/Verilog/System Who is familiar with Verilog and C/C++
•    Proficient in numerical design topics such as RTL simulation, logic synthesis, Timing Contraints, Timing Closure, STA (Static Timing Analysis)
•    who is in charge of SoC design methods and tools
•    PCIe, Uart, I2C,SPI,RS422,RS485,ARINC429,MIL – Who dominates communication protocols such as STD1553B
•    Laboratory tools such as oscilloscope, logic analyzer, ILA (Integrated Logic Analyzer); able to use their tools
Reasons for Preference
•    Experienced in the field of analog and digital communication
•    Experienced in Digital Signal Processing (DSP) and RF applications
•    Knowledge about Verification with UVM (Universal Verification Methodology)
•    We are looking for teammates who are proficient in scripting languages ​​such as Perl and TCL.


Key Qualifications
•    B.Sc. and/or M.Sc. in Electrical/Electronics Engineering, Electronics and Communication Engineering or Computer Engineering departments
•    Experience in FPGA (Preferred on Xilinx) design and verification
•    Good knowledge of VHDL/Verilog/System Verilog and C/C++
•    Understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA (Static Timing Analysis)
•    Experienced in SoC (Preferred Xilinx ZYNQ) design methodologies and tools
•    Experienced with serial communication protocols such as Ethernet, PCIe, UART, I2C, SPI, RS422, RS485, ARINC429, MIL – STD 1553B
•    Strong troubleshooting and analytical skills using laboratory equipment including oscilloscopes, logic analyzers, and ILA/signal tap, protocol analyzers are strongly preferred
Preferred Qualifications
•    Experience in Analog and Digital Communication
•    Experience in Digital Signal Processing and RF Applications
•    Knowledge of UVM (Universal Verification Methodology) and experience with formal verification is an asset
•    Experience in scripting languages ​​(Perl, TCL)